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authorN. Engelhardt <nak@yosyshq.com>2022-11-15 11:53:06 +0100
committerN. Engelhardt <nakengelhardt@gmail.com>2022-11-21 16:07:23 +0100
commitb64141f48bcd0d8283ddbe849ccf794c8b12d780 (patch)
tree94240de6c465537843bbaa4ab836ffb6058e9cf8 /passes/fsm/fsm.cc
parente56c6899626ff8f21ef402736e6fa5660ab2a63e (diff)
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mention prerequisites in fsm_detect and fsm help
Diffstat (limited to 'passes/fsm/fsm.cc')
-rw-r--r--passes/fsm/fsm.cc9
1 files changed, 9 insertions, 0 deletions
diff --git a/passes/fsm/fsm.cc b/passes/fsm/fsm.cc
index 0c5e624dc..8e7e09d4c 100644
--- a/passes/fsm/fsm.cc
+++ b/passes/fsm/fsm.cc
@@ -67,6 +67,15 @@ struct FsmPass : public Pass {
log(" -encfile file\n");
log(" passed through to fsm_recode pass\n");
log("\n");
+ log("This pass uses a subset of FF types to detect FSMs. Run 'opt -nosdff -nodffe'\n");
+ log("before this pass to prepare the design.\n");
+ log("\n");
+#ifdef YOSYS_ENABLE_VERIFIC
+ log("The Verific frontend may merge multiplexers in a way that interferes with FSM\n");
+ log("detection. Run 'verific -cfg db_infer_wide_muxes_post_elaboration 0' before\n");
+ log("reading the source, and 'bmuxmap' after 'proc' for best results.\n");
+ log("\n");
+#endif
}
void execute(std::vector<std::string> args, RTLIL::Design *design) override
{