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authorMarcelina Koƛcielnicka <mwk@0x04.net>2020-07-27 18:28:01 +0200
committerMarcelina Koƛcielnicka <mwk@0x04.net>2020-07-27 18:36:13 +0200
commita1a0abf52afe397e11b63bfc67e82aaf7bf9f498 (patch)
tree34df364fd6cda800734f8422bccd1eaeaa37e63f /passes/equiv/equiv_induct.cc
parentbd959d5d9ee1c0eda1921b737ba0c09dd8b2d62f (diff)
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equiv_induct: Fix up assumption for $equiv cells in -undef mode.
Before this fix, equiv_induct only assumed that one of the following is true: - defined value of A is equal to defined value of B - A is undefined This lets through valuations where A is defined, B is undefined, and the defined (meaningless) value of B happens to match the defined value of A. Instead, tighten this up to OR of the following: - defined value of A is equal to defined value of B, and B is not undefined - A is undefined
Diffstat (limited to 'passes/equiv/equiv_induct.cc')
-rw-r--r--passes/equiv/equiv_induct.cc4
1 files changed, 3 insertions, 1 deletions
diff --git a/passes/equiv/equiv_induct.cc b/passes/equiv/equiv_induct.cc
index 596c938fc..37aec50cd 100644
--- a/passes/equiv/equiv_induct.cc
+++ b/passes/equiv/equiv_induct.cc
@@ -65,8 +65,10 @@ struct EquivInductWorker
int ez_a = satgen.importSigBit(bit_a, step);
int ez_b = satgen.importSigBit(bit_b, step);
int cond = ez->IFF(ez_a, ez_b);
- if (satgen.model_undef)
+ if (satgen.model_undef) {
+ cond = ez->AND(cond, ez->NOT(satgen.importUndefSigBit(bit_b, step)));
cond = ez->OR(cond, satgen.importUndefSigBit(bit_a, step));
+ }
ez_equal_terms.push_back(cond);
}
}