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| author | Miodrag Milanović <mmicko@gmail.com> | 2022-02-09 12:41:26 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-02-09 12:41:26 +0100 |
| commit | a08fff9c0f36c050f8829a35dc19ea7e2e767fa1 (patch) | |
| tree | afb9c1e2f882c456ec22e7f802fb0ceccd4fd68f /passes/cmds | |
| parent | f61f2a4078f36bbb1e44285d25c9e62869520cfa (diff) | |
| parent | 2cef48bf2cb78aaa4b4dd1ea0bc064c8d12e7147 (diff) | |
| download | yosys-a08fff9c0f36c050f8829a35dc19ea7e2e767fa1.tar.gz yosys-a08fff9c0f36c050f8829a35dc19ea7e2e767fa1.tar.bz2 yosys-a08fff9c0f36c050f8829a35dc19ea7e2e767fa1.zip | |
Merge pull request #3193 from YosysHQ/micko/verific_f
Add ability to override verilog mode for verific -f command
Diffstat (limited to 'passes/cmds')
0 files changed, 0 insertions, 0 deletions