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author | Marcelina KoĆcielnicka <mwk@0x04.net> | 2021-02-23 00:21:46 +0100 |
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committer | Marcelina KoĆcielnicka <mwk@0x04.net> | 2021-03-08 20:16:29 +0100 |
commit | 4e03865d5bf3fafe0bd3735c88431675d53d2663 (patch) | |
tree | 7ef637bd0526b498d32386bc1c79c671a02af7f0 /passes/cmds | |
parent | c00a29296c8d3446c7cfe253080c7e33358219b0 (diff) | |
download | yosys-4e03865d5bf3fafe0bd3735c88431675d53d2663.tar.gz yosys-4e03865d5bf3fafe0bd3735c88431675d53d2663.tar.bz2 yosys-4e03865d5bf3fafe0bd3735c88431675d53d2663.zip |
Add support for memory writes in processes.
Diffstat (limited to 'passes/cmds')
-rw-r--r-- | passes/cmds/bugpoint.cc | 17 | ||||
-rw-r--r-- | passes/cmds/check.cc | 8 | ||||
-rw-r--r-- | passes/cmds/show.cc | 5 |
3 files changed, 30 insertions, 0 deletions
diff --git a/passes/cmds/bugpoint.cc b/passes/cmds/bugpoint.cc index da81e7f09..40207b1fc 100644 --- a/passes/cmds/bugpoint.cc +++ b/passes/cmds/bugpoint.cc @@ -339,6 +339,23 @@ struct BugpointPass : public Pass { return design_copy; } } + int i = 0; + for (auto it = sy->mem_write_actions.begin(); it != sy->mem_write_actions.end(); ++it, ++i) + { + if (index++ == seed) + { + log_header(design, "Trying to remove sync %s memwr %s %s %s %s in %s.%s.\n", log_signal(sy->signal), log_id(it->memid), log_signal(it->address), log_signal(it->data), log_signal(it->enable), log_id(mod), log_id(pr.first)); + sy->mem_write_actions.erase(it); + // Remove the bit for removed action from other actions' priority masks. + for (auto it2 = sy->mem_write_actions.begin(); it2 != sy->mem_write_actions.end(); ++it2) { + auto &mask = it2->priority_mask; + if (GetSize(mask) > i) { + mask.bits.erase(mask.bits.begin() + i); + } + } + return design_copy; + } + } } } } diff --git a/passes/cmds/check.cc b/passes/cmds/check.cc index 36febb98a..b502b0788 100644 --- a/passes/cmds/check.cc +++ b/passes/cmds/check.cc @@ -141,6 +141,14 @@ struct CheckPass : public Pass { for (auto bit : sigmap(action.second)) if (bit.wire) used_wires.insert(bit); } + for (auto memwr : sync->mem_write_actions) { + for (auto bit : sigmap(memwr.address)) + if (bit.wire) used_wires.insert(bit); + for (auto bit : sigmap(memwr.data)) + if (bit.wire) used_wires.insert(bit); + for (auto bit : sigmap(memwr.enable)) + if (bit.wire) used_wires.insert(bit); + } } } diff --git a/passes/cmds/show.cc b/passes/cmds/show.cc index 0c96f8c5d..a389c3179 100644 --- a/passes/cmds/show.cc +++ b/passes/cmds/show.cc @@ -339,6 +339,11 @@ struct ShowWorker { input_signals.insert(obj->signal); collect_proc_signals(obj->actions, input_signals, output_signals); + for (auto it : obj->mem_write_actions) { + input_signals.insert(it.address); + input_signals.insert(it.data); + input_signals.insert(it.enable); + } } void collect_proc_signals(RTLIL::Process *obj, std::set<RTLIL::SigSpec> &input_signals, std::set<RTLIL::SigSpec> &output_signals) |