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author | Clifford Wolf <clifford@clifford.at> | 2016-04-21 23:28:37 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2016-04-21 23:28:37 +0200 |
commit | 0bc95f1e049afc35bb5ea30663b0a5725dfbf584 (patch) | |
tree | 3a8641d3a9bb5794a24145ce368f3db7a3963709 /passes/cmds/splice.cc | |
parent | 1565d1af69f552b790aa43fd6be194ee59ab76f3 (diff) | |
download | yosys-0bc95f1e049afc35bb5ea30663b0a5725dfbf584.tar.gz yosys-0bc95f1e049afc35bb5ea30663b0a5725dfbf584.tar.bz2 yosys-0bc95f1e049afc35bb5ea30663b0a5725dfbf584.zip |
Added "yosys -D" feature
Diffstat (limited to 'passes/cmds/splice.cc')
-rw-r--r-- | passes/cmds/splice.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/cmds/splice.cc b/passes/cmds/splice.cc index 2556fb740..7418ec4d2 100644 --- a/passes/cmds/splice.cc +++ b/passes/cmds/splice.cc @@ -341,7 +341,7 @@ struct SplicePass : public Pass { if (!ports.empty() && !no_ports.empty()) log_cmd_error("The options -port and -no_port are exclusive!\n"); - log_header("Executing SPLICE pass (creating cells for signal splicing).\n"); + log_header(design, "Executing SPLICE pass (creating cells for signal splicing).\n"); for (auto &mod_it : design->modules_) { |