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author | Claire Xenia Wolf <claire@clairexen.net> | 2021-05-04 18:54:10 +0200 |
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committer | Jannis Harder <me@jix.one> | 2022-10-07 16:04:51 +0200 |
commit | afa5e6bb53f15abf26ec9a0c633539cc95f57f60 (patch) | |
tree | 406c2f429a801e62d210f90b820b2cc6cf14c60f /misc | |
parent | 381ce66f5870291fe950c276c492b303f714738f (diff) | |
download | yosys-afa5e6bb53f15abf26ec9a0c633539cc95f57f60.tar.gz yosys-afa5e6bb53f15abf26ec9a0c633539cc95f57f60.tar.bz2 yosys-afa5e6bb53f15abf26ec9a0c633539cc95f57f60.zip |
Exclude primary inputs from quiv_make rewiring
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
Diffstat (limited to 'misc')
0 files changed, 0 insertions, 0 deletions