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| author | Eddie Hung <eddie@fpgeh.com> | 2019-09-19 18:59:28 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-19 18:59:28 -0700 |
| commit | e09f80479e6d16cf95c26e406bf06d81b94231f4 (patch) | |
| tree | 44e0ac0df9cfb0801bf919a75d2e70a61bbdb7d4 /manual | |
| parent | 362a803779ac1a8a3af1e4991b80b0c4c71e02ff (diff) | |
| download | yosys-e09f80479e6d16cf95c26e406bf06d81b94231f4.tar.gz yosys-e09f80479e6d16cf95c26e406bf06d81b94231f4.tar.bz2 yosys-e09f80479e6d16cf95c26e406bf06d81b94231f4.zip | |
Fix DSP48E1 timing by breaking P path if MREG or PREG
Diffstat (limited to 'manual')
0 files changed, 0 insertions, 0 deletions