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author | Clifford Wolf <clifford@clifford.at> | 2013-07-20 15:19:12 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2013-07-20 15:19:12 +0200 |
commit | 61ed6b32d1f5fbfda9c6effdaa678092f8156bfa (patch) | |
tree | 3a53692cbd93a09eabeb67eff5e9e4ace5cf1a3e /manual/manual.tex | |
parent | 3650fd7fbe45a00792770d9ecb9397bc27ea0845 (diff) | |
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Added Yosys Manual
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diff --git a/manual/manual.tex b/manual/manual.tex new file mode 100644 index 000000000..857c54abc --- /dev/null +++ b/manual/manual.tex @@ -0,0 +1,211 @@ +\documentclass[oneside,a4paper]{book} + +\usepackage[T1]{fontenc} % required for luximono! +\usepackage{lmodern} +\usepackage[scaled=0.8]{luximono} % typewriter font with bold face + +% To install the luximono font files: +% getnonfreefonts-sys --all or +% getnonfreefonts-sys luximono +% +% when there are trouble you might need to: +% - Create /etc/texmf/updmap.d/99local-luximono.cfg +% containing the single line: Map ul9.map +% - Run update-updmap followed by mktexlsr and updmap-sys +% +% This commands must be executed as root with a root environment +% (i.e. run "sudo su" and then execute the commands in the root +% shell, don't just prefix the commands with "sudo"). + +% formats the text accourding the set language +\usepackage[english]{babel} +\usepackage[table,usenames]{xcolor} +% generates indices with the "\index" command +\usepackage{makeidx} +% enables import of graphics. We use pdflatex here so do the pdf optimisation. +%\usepackage[dvips]{graphicx} +\usepackage[pdftex]{graphicx} +\usepackage{pdfpages} +% includes floating objects like tables and figures. +\usepackage{float} +% for generating subfigures with ohne indented captions +\usepackage[hang]{subfigure} +% redefines and smartens captions of figures and tables (indentation, smaller and boldface) +\usepackage[hang,small,bf,center]{caption} +% enables tabstops and the numeration of lines +\usepackage{moreverb} +% enables user defined header and footer lines (former "fancyheadings") +\usepackage{fancyhdr} +% Some smart mathematical stuff +\usepackage{amsmath} +% Package for rotating several objects +\usepackage{rotating} +\usepackage{natbib} +\usepackage{epsf} +\usepackage{dsfont} +\usepackage[algochapter, boxruled, vlined]{algorithm2e} +%Activating and setting of character protruding - if you like +%\usepackage[activate,DVIoutput]{pdfcprot} +% If you really need special chars... +\usepackage[latin1]{inputenc} +% Hyperlinks +\usepackage[colorlinks,hyperindex,plainpages=false,% +pdftitle={Yosys Manual},% +pdfauthor={Clifford Wolf},% +%pdfkeywords={keyword},% +pdfpagelabels,% +pagebackref,% +bookmarksopen=false% +]{hyperref} +% For the two different reference lists ... +\usepackage{multibib} +\usepackage{multirow} +\usepackage{booktabs} + +\usepackage{listings} +\usepackage{pifont} +\usepackage{skull} +% \usepackage{draftwatermark} + +\usepackage{tikz} +\usetikzlibrary{calc} +\usetikzlibrary{arrows} +\usetikzlibrary{scopes} +\usetikzlibrary{through} +\usetikzlibrary{shapes.geometric} + +\lstset{basicstyle=\ttfamily} + +\def\B#1{{\tt\textbackslash{}#1}} +\def\C#1{\lstinline[language=C++]{#1}} +\def\V#1{\lstinline[language=Verilog]{#1}} + +\newsavebox{\fixmebox} +\newenvironment{fixme}% +{\newcommand\colboxcolor{FFBBBB}% +\begin{lrbox}{\fixmebox}% +\begin{minipage}{\dimexpr\columnwidth-2\fboxsep\relax}} +{\end{minipage}\end{lrbox}\textbf{FIXME: }\\% +\colorbox[HTML]{\colboxcolor}{\usebox{\fixmebox}}} + +\newcites{weblink}{Internet References} + +\setcounter{secnumdepth}{3} +\makeindex + +\setlength{\oddsidemargin}{4mm} +\setlength{\evensidemargin}{-6mm} +\setlength{\textwidth}{162mm} +\setlength{\textheight}{230mm} +\setlength{\topmargin}{-5mm} + +\setlength{\parskip}{1.5ex plus 1ex minus 0.5ex} +\setlength{\parindent}{0pt} + +\begin{document} + +\fancypagestyle{mypagestyle}{% +\fancyhf{}% +\fancyhead[C]{\leftmark}% +\fancyfoot[C]{\thepage}% +\renewcommand{\headrulewidth}{0pt}% +\renewcommand{\footrulewidth}{0pt}} +\pagestyle{mypagestyle} + +\thispagestyle{empty} +\null\vfil + +\begin{center} +\bf\Huge Yosys Manual + +\bigskip +\large Clifford Wolf +\end{center} + +\vfil\null +\eject + +\chapter*{Abstract} +Most of todays digital design is done in HDL code (mostly Verilog or VHDL) and +with the help of HDL synthesis tools. + +In special cases such as synthesis for coarse-grain cell libraries or when +testing new synthesis algorithms it might be neccessary to write a custom HDL +synthesis tool or add new features to an existing one. It this cases the +availability of a Free and Open Source (FOSS) synthesis tool that can be used +as basis for custom tools would be helpful. + +In the absence of such a tool, the Yosys Open SYnthesis Suite (Yosys) was +developped. This document covers the design and implementation of this tool. +At the moment the main focus of Yosys lies on the high-level aspects of +digital synthesis. The pre-existing FOSS logic-synthesis tool ABC is used +by Yosys to perform advanced gate-level optimizations. + +An evaluation of Yosys based on real-world designs is included. It is shown +that Yosys can be used as-is to synthesize such designs. The results produced +by Yosys in this tests where successflly verified using formal verification +and are compareable in quality to the results produced by a commercial +synthesis tool. + +\bigskip + +This document was originally published as bachelor thesis at the Vienna +University of Technology \cite{BACC}. + +\chapter*{Abbreviations} +\begin{tabular}{ll} +AIG & And-Inverter-Graph \\ +ASIC & Application-Specific Integrated Circuit \\ +AST & Abstract Syntax Tree \\ +BDD & Binary Decicion Diagram \\ +BLIF & Berkeley Logic Interchange Format \\ +EDA & Electronic Design Automation \\ +EDIF & Electronic Design Interchange Format \\ +ER Diagram & Entity-Relationship Diagram \\ +FOSS & Free and Open-Source Software \\ +FPGA & Field-Programmable Gate Array \\ +FSM & Finite-state machine \\ +HDL & Hardware Description Language \\ +LPM & Library of Parameterized Modules \\ +RTLIL & RTL Intermediate Language \\ +RTL & Register Transfer Level \\ +SAT & Satisfiability Problem \\ +% SSA & Static Single Assignment Form \\ +VHDL & VHSIC Hardware Description Language \\ +VHSIC & Very-High-Speed Integrated Circuit \\ +YOSYS & Yosys Open SYnthesis Suite \\ +\end{tabular} + +\tableofcontents + +\include{CHAPTER_Intro} +\include{CHAPTER_Basics} +\include{CHAPTER_Approach} +\include{CHAPTER_Overview} +\include{CHAPTER_CellLib} +\include{CHAPTER_Prog} + +\include{CHAPTER_Verilog} +\include{CHAPTER_Optimize} +\include{CHAPTER_Techmap} +\include{CHAPTER_Eval} + +\appendix + +\include{CHAPTER_Auxlibs} +\include{CHAPTER_Auxprogs} + +\chapter{Command Reference Manual} +\label{commandref} +\input{command-reference-manual} + +\include{CHAPTER_Appnotes} +\include{CHAPTER_StateOfTheArt} + +\bibliography{literature} +\bibliographystyle{alphadin} + +\bibliographyweblink{weblinks} +\bibliographystyleweblink{abbrv} + +\end{document} |