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authorEddie Hung <eddie@fpgeh.com>2019-09-19 14:58:06 -0700
committerEddie Hung <eddie@fpgeh.com>2019-09-19 14:58:06 -0700
commit95db2489bdb515a2e9d3a995574adc8c1071d3c0 (patch)
treea5b34f8630a5a940a37f278ddd20b7816394d182 /libs
parent3b9b0fcd0630133092b23a18453eb420534b2369 (diff)
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synth_xilinx to infer DSPs for Y_WIDTH >= 9 and [AB]_WIDTH >= 2
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