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| author | Clifford Wolf <clifford@clifford.at> | 2013-03-02 13:53:59 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2013-03-02 13:53:59 +0100 |
| commit | 84cdfa55fc81c233a308c82c5fa6d482b8661ca0 (patch) | |
| tree | 20c4635bdda03b64503a8ea0808f5e18b48ec7b2 /libs/subcircuit/test_mine.txt | |
| parent | a338d1a082726d84210912318a9ac49977dc380c (diff) | |
| download | yosys-84cdfa55fc81c233a308c82c5fa6d482b8661ca0.tar.gz yosys-84cdfa55fc81c233a308c82c5fa6d482b8661ca0.tar.bz2 yosys-84cdfa55fc81c233a308c82c5fa6d482b8661ca0.zip | |
Added frequent subcircuit miner to subcircuit library
Diffstat (limited to 'libs/subcircuit/test_mine.txt')
| -rw-r--r-- | libs/subcircuit/test_mine.txt | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/libs/subcircuit/test_mine.txt b/libs/subcircuit/test_mine.txt new file mode 100644 index 000000000..e3b9170b7 --- /dev/null +++ b/libs/subcircuit/test_mine.txt @@ -0,0 +1,35 @@ + +# verbose + +graph macc22 + node mul_1 mul A 32 B 32 Y 32 + node mul_2 mul A 32 B 32 Y 32 + node add_1 add A 32 B 32 Y 32 + connect mul_1 Y add_1 A + connect mul_2 Y add_1 B + allextern +endgraph + +graph macc4x2 + node mul_1 mul A 32 B 32 Y 32 + node mul_2 mul A 32 B 32 Y 32 + node mul_3 mul A 32 B 32 Y 32 + node mul_4 mul A 32 B 32 Y 32 + node add_1 add A 32 B 32 Y 32 + node add_2 add A 32 B 32 Y 32 + node add_3 add A 32 B 32 Y 32 + connect mul_1 Y add_1 A + connect mul_2 Y add_1 B + connect mul_3 Y add_2 A + connect mul_4 Y add_2 B + connect add_1 Y add_3 A + connect add_2 Y add_3 B + allextern +endgraph + +swapgroup mul A B +swapgroup add A B + +mine 2 10 2 +expect 5 + |