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| author | Jannis Harder <me@jix.one> | 2023-01-11 17:52:25 +0100 |
|---|---|---|
| committer | Jannis Harder <me@jix.one> | 2023-01-11 18:07:16 +0100 |
| commit | d6c7aa0e3d9e64827a8305610bedcc9a9df88a49 (patch) | |
| tree | 48815889229b82f1729f213c6aa2c6a97c2b5b3b /kernel | |
| parent | 7ddec5093f09640db0f502dfa341c25e4028563f (diff) | |
| download | yosys-d6c7aa0e3d9e64827a8305610bedcc9a9df88a49.tar.gz yosys-d6c7aa0e3d9e64827a8305610bedcc9a9df88a49.tar.bz2 yosys-d6c7aa0e3d9e64827a8305610bedcc9a9df88a49.zip | |
sim/formalff: Clock handling for yw cosim
Diffstat (limited to 'kernel')
| -rw-r--r-- | kernel/yw.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/kernel/yw.h b/kernel/yw.h index 503319b1d..c2f5921b1 100644 --- a/kernel/yw.h +++ b/kernel/yw.h @@ -69,8 +69,8 @@ struct ReadWitness struct Clock { IdPath path; int offset; - bool is_posedge; - bool is_negedge; + bool is_posedge = false; + bool is_negedge = false; }; struct Signal { |