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author | Eddie Hung <eddie@fpgeh.com> | 2020-04-16 08:06:12 -0700 |
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committer | GitHub <noreply@github.com> | 2020-04-16 08:06:12 -0700 |
commit | aa552cefa3bd0e98346508a8c45a7805353f8305 (patch) | |
tree | cde71fc43321c703d2d4cf77bf912262a6453a7d /kernel | |
parent | 90a1c6b6a4a5633399106c4a0558607cd1a1579b (diff) | |
parent | 75bb2c8c2472f4f09c556c09ae0ac3fb6a70d41a (diff) | |
download | yosys-aa552cefa3bd0e98346508a8c45a7805353f8305.tar.gz yosys-aa552cefa3bd0e98346508a8c45a7805353f8305.tar.bz2 yosys-aa552cefa3bd0e98346508a8c45a7805353f8305.zip |
Merge pull request #1927 from YosysHQ/eddie/design_remove_assert
kernel: Design::remove(RTLIL::Module *) to check refcount_modules_
Diffstat (limited to 'kernel')
-rw-r--r-- | kernel/rtlil.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index dc368ead5..6996a02c4 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -597,6 +597,7 @@ void RTLIL::Design::remove(RTLIL::Module *module) } log_assert(modules_.at(module->name) == module); + log_assert(refcount_modules_ == 0); modules_.erase(module->name); delete module; } |