diff options
| author | Eddie Hung <eddie@fpgeh.com> | 2020-01-28 11:55:51 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-01-28 11:55:51 -0800 |
| commit | 7939727d14f44b5d56ca3806d0907e9fceea2882 (patch) | |
| tree | 8237e2063e8e8b39bf0b8142c82a447f9c7ae3d6 /kernel | |
| parent | 245b8c4ab64c5c3bd7b9f71f94316a76a2576fd1 (diff) | |
| parent | 6d27d4372730cb94306a4f314482459f9d527d7c (diff) | |
| download | yosys-7939727d14f44b5d56ca3806d0907e9fceea2882.tar.gz yosys-7939727d14f44b5d56ca3806d0907e9fceea2882.tar.bz2 yosys-7939727d14f44b5d56ca3806d0907e9fceea2882.zip | |
Merge pull request #1660 from YosysHQ/eddie/abc9_unpermute_luts
Unpermute LUT ordering for ice40/ecp5/xilinx
Diffstat (limited to 'kernel')
| -rw-r--r-- | kernel/rtlil.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/kernel/rtlil.h b/kernel/rtlil.h index 6251d265d..58c5d9674 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -851,6 +851,8 @@ public: RTLIL::SigSpec repeat(int num) const; + void reverse() { inline_unpack(); std::reverse(bits_.begin(), bits_.end()); } + bool operator <(const RTLIL::SigSpec &other) const; bool operator ==(const RTLIL::SigSpec &other) const; inline bool operator !=(const RTLIL::SigSpec &other) const { return !(*this == other); } |