Merge pull request #1778 from rswarbrick/sv-defines

Add support for SystemVerilog-style `define to Verilog frontend

2 files changed, 6 insertions, 1 deletions

diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index 06181b763..79e50cccd 100644
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -21,6 +21,7 @@
 #include "kernel/macc.h"
 #include "kernel/celltypes.h"
 #include "frontends/verilog/verilog_frontend.h"
+#include "frontends/verilog/preproc.h"
 #include "backends/ilang/ilang_backend.h"
 
 #include <string.h>
@@ -379,6 +380,7 @@ void RTLIL::Selection::optimize(RTLIL::Design *design)
 }
 
 RTLIL::Design::Design()
+  : verilog_defines (new define_map_t)
 {
 	static unsigned int hashidx_count = 123456789;
 	hashidx_count = mkhash_xorshift(hashidx_count);
diff --git a/kernel/rtlil.h b/kernel/rtlil.h
index 58c5d9674..4afe4304f 100644
--- a/kernel/rtlil.h
+++ b/kernel/rtlil.h
@@ -952,6 +952,9 @@ struct RTLIL::Monitor
 	virtual void notify_blackout(RTLIL::Module*) { }
 };
 
+// Forward declaration; defined in preproc.h.
+struct define_map_t;
+
 struct RTLIL::Design
 {
 	unsigned int hashidx_;
@@ -963,7 +966,7 @@ struct RTLIL::Design
 	int refcount_modules_;
 	dict<RTLIL::IdString, RTLIL::Module*> modules_;
 	std::vector<AST::AstNode*> verilog_packages, verilog_globals;
-	dict<std::string, std::pair<std::string, bool>> verilog_defines;
+	std::unique_ptr<define_map_t> verilog_defines;
 
 	std::vector<RTLIL::Selection> selection_stack;
 	dict<RTLIL::IdString, RTLIL::Selection> selection_vars;