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| author | whitequark <whitequark@whitequark.org> | 2020-07-16 10:34:21 +0000 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2020-07-16 10:44:08 +0000 |
| commit | d9f680b2363aded426465fd189910e0072228fee (patch) | |
| tree | 19e3e20d5cbb20a508a2b6c7c4e3a63f894f038a /kernel/yosys.cc | |
| parent | 3209c0762a560d68ce7aef00942a8b3e440d5a61 (diff) | |
| download | yosys-d9f680b2363aded426465fd189910e0072228fee.tar.gz yosys-d9f680b2363aded426465fd189910e0072228fee.tar.bz2 yosys-d9f680b2363aded426465fd189910e0072228fee.zip | |
verilog_backend: add `-sv` option, make `-o <filename>.sv` work.
See #2271.
Diffstat (limited to 'kernel/yosys.cc')
| -rw-r--r-- | kernel/yosys.cc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/kernel/yosys.cc b/kernel/yosys.cc index 7e9f320e0..8986c8091 100644 --- a/kernel/yosys.cc +++ b/kernel/yosys.cc @@ -1050,6 +1050,8 @@ void run_backend(std::string filename, std::string command, RTLIL::Design *desig if (command == "auto") { if (filename.size() > 2 && filename.compare(filename.size()-2, std::string::npos, ".v") == 0) command = "verilog"; + else if (filename.size() > 3 && filename.compare(filename.size()-3, std::string::npos, ".sv") == 0) + command = "verilog -sv"; else if (filename.size() > 3 && filename.compare(filename.size()-3, std::string::npos, ".il") == 0) command = "ilang"; else if (filename.size() > 3 && filename.compare(filename.size()-3, std::string::npos, ".cc") == 0) |