diff options
author | Eddie Hung <eddie@fpgeh.com> | 2020-04-02 07:13:33 -0700 |
---|---|---|
committer | GitHub <noreply@github.com> | 2020-04-02 07:13:33 -0700 |
commit | 37f42fe102e329793b884a47321423062eedfce7 (patch) | |
tree | 42cca1494ce7d806e8a638fe56bc8acd13733a21 /kernel/modtools.h | |
parent | 347774945972dc71910a3e38c9ec678f74f97d03 (diff) | |
parent | 348e8923148f1cc1bfb87bb71b7566d4bc111704 (diff) | |
download | yosys-37f42fe102e329793b884a47321423062eedfce7.tar.gz yosys-37f42fe102e329793b884a47321423062eedfce7.tar.bz2 yosys-37f42fe102e329793b884a47321423062eedfce7.zip |
Merge pull request #1845 from YosysHQ/eddie/kernel_speedup
kernel: speedup by using more pass-by-const-ref
Diffstat (limited to 'kernel/modtools.h')
-rw-r--r-- | kernel/modtools.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/kernel/modtools.h b/kernel/modtools.h index 383b37589..fbc5482ee 100644 --- a/kernel/modtools.h +++ b/kernel/modtools.h @@ -158,7 +158,7 @@ struct ModIndex : public RTLIL::Monitor #endif } - void notify_connect(RTLIL::Cell *cell, const RTLIL::IdString &port, const RTLIL::SigSpec &old_sig, RTLIL::SigSpec &sig) YS_OVERRIDE + void notify_connect(RTLIL::Cell *cell, const RTLIL::IdString &port, const RTLIL::SigSpec &old_sig, const RTLIL::SigSpec &sig) YS_OVERRIDE { log_assert(module == cell->module); |