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author | whitequark <whitequark@whitequark.org> | 2020-09-02 15:18:44 +0000 |
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committer | whitequark <whitequark@whitequark.org> | 2020-09-02 17:19:11 +0000 |
commit | b025ee0aa646268747c121c97cf0673eb06e632b (patch) | |
tree | 2bcfbcc21c8cfc2c572418c79e43b99b5cfda83e /kernel/consteval.h | |
parent | 8d6e5c63916bcff84164240cccce0e717e489a8d (diff) | |
download | yosys-b025ee0aa646268747c121c97cf0673eb06e632b.tar.gz yosys-b025ee0aa646268747c121c97cf0673eb06e632b.tar.bz2 yosys-b025ee0aa646268747c121c97cf0673eb06e632b.zip |
cxxrtl: expose port direction in debug information.
This can be useful to distinguish e.g. a combinatorially driven wire
with type `CXXRTL_VALUE` from a module input with the same type, as
well as general introspection.
Diffstat (limited to 'kernel/consteval.h')
0 files changed, 0 insertions, 0 deletions