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author | Clifford Wolf <clifford@clifford.at> | 2014-07-23 16:09:27 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2014-07-23 19:34:51 +0200 |
commit | a62c21c9c64ad5b3e0dae5d4ee4857425f73068e (patch) | |
tree | 81cbbd4bbd869af6290eb0e19e4cfdfbc9555c03 /kernel/consteval.h | |
parent | 54552f680938fd933b07fa38597937ba6d367be7 (diff) | |
download | yosys-a62c21c9c64ad5b3e0dae5d4ee4857425f73068e.tar.gz yosys-a62c21c9c64ad5b3e0dae5d4ee4857425f73068e.tar.bz2 yosys-a62c21c9c64ad5b3e0dae5d4ee4857425f73068e.zip |
Removed RTLIL::SigSpec::expand() method
Diffstat (limited to 'kernel/consteval.h')
-rw-r--r-- | kernel/consteval.h | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/kernel/consteval.h b/kernel/consteval.h index 5836cdd5b..3a8ef44a0 100644 --- a/kernel/consteval.h +++ b/kernel/consteval.h @@ -71,11 +71,8 @@ struct ConstEval assign_map.apply(sig); #ifndef NDEBUG RTLIL::SigSpec current_val = values_map(sig); - current_val.expand(); - for (size_t i = 0; i < current_val.chunks().size(); i++) { - const RTLIL::SigChunk &chunk = current_val.chunks()[i]; - assert(chunk.wire != NULL || chunk.data.bits[0] == value.bits[i]); - } + for (int i = 0; i < SIZE(current_val); i++) + assert(current_val[i].wire != NULL || current_val[i] == value.bits[i]); #endif values_map.add(sig, RTLIL::SigSpec(value)); } |