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authorClifford Wolf <clifford@clifford.at>2014-08-02 00:45:25 +0200
committerClifford Wolf <clifford@clifford.at>2014-08-02 00:45:25 +0200
commit14412e6c957a34381c33740426b35f7b90a446be (patch)
treed45765adc9aa28301ab0c9d100728a5d720503fd /kernel/celltypes.h
parent75ffd1643c97321255bc591edf0c1a7097b8dce9 (diff)
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Preparations for RTLIL::IdString redesign: cleanup of existing code
Diffstat (limited to 'kernel/celltypes.h')
-rw-r--r--kernel/celltypes.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/kernel/celltypes.h b/kernel/celltypes.h
index e1a1110d3..993863827 100644
--- a/kernel/celltypes.h
+++ b/kernel/celltypes.h
@@ -29,7 +29,7 @@
struct CellTypes
{
- std::set<std::string> cell_types;
+ std::set<RTLIL::IdString> cell_types;
std::vector<const RTLIL::Design*> designs;
CellTypes()
@@ -168,7 +168,7 @@ struct CellTypes
designs.clear();
}
- bool cell_known(std::string type)
+ bool cell_known(RTLIL::IdString type)
{
if (cell_types.count(type) > 0)
return true;
@@ -178,7 +178,7 @@ struct CellTypes
return false;
}
- bool cell_output(std::string type, std::string port)
+ bool cell_output(RTLIL::IdString type, RTLIL::IdString port)
{
if (cell_types.count(type) == 0) {
for (auto design : designs)
@@ -201,7 +201,7 @@ struct CellTypes
return false;
}
- bool cell_input(std::string type, std::string port)
+ bool cell_input(RTLIL::IdString type, RTLIL::IdString port)
{
if (cell_types.count(type) == 0) {
for (auto design : designs)
@@ -219,7 +219,7 @@ struct CellTypes
return false;
}
- static RTLIL::Const eval(std::string type, const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
+ static RTLIL::Const eval(RTLIL::IdString type, const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
{
if (type == "$sshr" && !signed1)
type = "$shr";