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author | Clifford Wolf <clifford@clifford.at> | 2015-06-09 07:19:04 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2015-06-09 07:25:12 +0200 |
commit | b57cb4a7fea01b1e5b3242d3ee4bd90077bac960 (patch) | |
tree | d049486342b92eb5c85bcaa02ea57df3912dbdc9 /kernel/cellaigs.h | |
parent | c88be7bae5e06a605aea0cebc483bf5d02737bf1 (diff) | |
download | yosys-b57cb4a7fea01b1e5b3242d3ee4bd90077bac960.tar.gz yosys-b57cb4a7fea01b1e5b3242d3ee4bd90077bac960.tar.bz2 yosys-b57cb4a7fea01b1e5b3242d3ee4bd90077bac960.zip |
Merge clock inverters in memory_dff
Diffstat (limited to 'kernel/cellaigs.h')
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