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author | Clifford Wolf <clifford@clifford.at> | 2014-07-28 11:08:55 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2014-07-28 11:27:48 +0200 |
commit | 7bd2d1064f2eceddc3c93c121c4154a2f594a040 (patch) | |
tree | 563de1df5e323d0f217a51e29acb56c9e9f1327d /kernel/bitpattern.h | |
parent | d86a25f145012ccb6b2048af3aae22f13b97b505 (diff) | |
download | yosys-7bd2d1064f2eceddc3c93c121c4154a2f594a040.tar.gz yosys-7bd2d1064f2eceddc3c93c121c4154a2f594a040.tar.bz2 yosys-7bd2d1064f2eceddc3c93c121c4154a2f594a040.zip |
Using log_assert() instead of assert()
Diffstat (limited to 'kernel/bitpattern.h')
-rw-r--r-- | kernel/bitpattern.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/kernel/bitpattern.h b/kernel/bitpattern.h index 05b2bbc24..91f54593f 100644 --- a/kernel/bitpattern.h +++ b/kernel/bitpattern.h @@ -66,8 +66,8 @@ struct BitPatternPool bool match(bits_t a, bits_t b) { - assert(int(a.size()) == width); - assert(int(b.size()) == width); + log_assert(int(a.size()) == width); + log_assert(int(b.size()) == width); for (int i = 0; i < width; i++) if (a[i] <= RTLIL::State::S1 && b[i] <= RTLIL::State::S1 && a[i] != b[i]) return false; |