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author | KrystalDelusion <krystinedawn@yosyshq.com> | 2022-12-19 10:42:21 +1300 |
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committer | KrystalDelusion <krystinedawn@yosyshq.com> | 2022-12-19 10:42:21 +1300 |
commit | f2a4e5f1a077e7980598114adf33951132e60785 (patch) | |
tree | 776119ff9b1e4095b30fa63f8e7b5e313970911e /guidelines/Checklists | |
parent | f33a21eea4f63f19f467abc23aa903db85dbae0b (diff) | |
download | yosys-f2a4e5f1a077e7980598114adf33951132e60785.tar.gz yosys-f2a4e5f1a077e7980598114adf33951132e60785.tar.bz2 yosys-f2a4e5f1a077e7980598114adf33951132e60785.zip |
Fixing other references to the manual
And files that were in the directory.
Diffstat (limited to 'guidelines/Checklists')
-rw-r--r-- | guidelines/Checklists | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/guidelines/Checklists b/guidelines/Checklists index cc61c7876..51756cfd7 100644 --- a/guidelines/Checklists +++ b/guidelines/Checklists @@ -11,7 +11,7 @@ Things to do right away: Things to do after finalizing the cell interface: - Add support to kernel/satgen.h for the new cell type - - Add to manual/CHAPTER_CellLib.tex (or just add a fixme to the bottom) + - Add to docs/source/CHAPTER_CellLib.rst (or just add a fixme to the bottom) - Maybe add support to the Verilog backend for dumping such cells as expression @@ -29,11 +29,9 @@ Update the CHANGELOG file: Update and check documentation: cd ~yosys - make update-manual - make manual - - sanity check the figures in the appnotes and presentation + make docs + - sanity check the figures in docs/images - if there are any odd things -> investigate - - make cosmetic changes to the .tex files if necessary cd ~yosys vi README guidelines/* @@ -108,13 +106,11 @@ Release: Updating the website: cd ~yosys - make manual make install - - update pdf files on the website - cd ~yosys-web - make update_cmd make update_show git commit -am update make push + + - Read the Docs updates handled by Jenkins on source change |