diff options
author | Clifford Wolf <clifford@clifford.at> | 2013-12-04 14:24:44 +0100 |
---|---|---|
committer | Clifford Wolf <clifford@clifford.at> | 2013-12-04 14:24:44 +0100 |
commit | f4b46ed31e5f5c41bbd4ee1fdf996ecdc2010174 (patch) | |
tree | ab513e840494e2be4b04149a149f7c12e605e7e4 /frontends | |
parent | 93a70959f3f67ffcee8159b18a5f68904e32a074 (diff) | |
download | yosys-f4b46ed31e5f5c41bbd4ee1fdf996ecdc2010174.tar.gz yosys-f4b46ed31e5f5c41bbd4ee1fdf996ecdc2010174.tar.bz2 yosys-f4b46ed31e5f5c41bbd4ee1fdf996ecdc2010174.zip |
Replaced signed_parameters API with CONST_FLAG_SIGNED
Diffstat (limited to 'frontends')
-rw-r--r-- | frontends/ast/ast.cc | 4 | ||||
-rw-r--r-- | frontends/ast/ast.h | 2 | ||||
-rw-r--r-- | frontends/ast/genrtlil.cc | 4 | ||||
-rw-r--r-- | frontends/ilang/parser.y | 2 |
4 files changed, 4 insertions, 8 deletions
diff --git a/frontends/ast/ast.cc b/frontends/ast/ast.cc index ec017216d..ccadc2069 100644 --- a/frontends/ast/ast.cc +++ b/frontends/ast/ast.cc @@ -819,7 +819,7 @@ AstModule::~AstModule() } // create a new parametric module (when needed) and return the name of the generated module -RTLIL::IdString AstModule::derive(RTLIL::Design *design, std::map<RTLIL::IdString, RTLIL::Const> parameters, std::set<RTLIL::IdString> signed_parameters) +RTLIL::IdString AstModule::derive(RTLIL::Design *design, std::map<RTLIL::IdString, RTLIL::Const> parameters) { log_header("Executing AST frontend in derive mode using pre-parsed AST for module `%s'.\n", name.c_str()); @@ -853,7 +853,7 @@ RTLIL::IdString AstModule::derive(RTLIL::Design *design, std::map<RTLIL::IdStrin rewrite_parameter: para_info += stringf("%s=%s", child->str.c_str(), log_signal(RTLIL::SigSpec(parameters[para_id]))); delete child->children.at(0); - child->children[0] = AstNode::mkconst_bits(parameters[para_id].bits, signed_parameters.count(para_id) > 0); + child->children[0] = AstNode::mkconst_bits(parameters[para_id].bits, (parameters[para_id].flags & RTLIL::CONST_FLAG_SIGNED) != 0); hash_data.insert(hash_data.end(), child->str.begin(), child->str.end()); hash_data.push_back(0); hash_data.insert(hash_data.end(), parameters[para_id].bits.begin(), parameters[para_id].bits.end()); diff --git a/frontends/ast/ast.h b/frontends/ast/ast.h index 4cdb564a5..f90fe9b7b 100644 --- a/frontends/ast/ast.h +++ b/frontends/ast/ast.h @@ -229,7 +229,7 @@ namespace AST AstNode *ast; bool nolatches, nomem2reg, mem2reg, lib, noopt; virtual ~AstModule(); - virtual RTLIL::IdString derive(RTLIL::Design *design, std::map<RTLIL::IdString, RTLIL::Const> parameters, std::set<RTLIL::IdString> signed_parameters); + virtual RTLIL::IdString derive(RTLIL::Design *design, std::map<RTLIL::IdString, RTLIL::Const> parameters); virtual RTLIL::Module *clone() const; }; diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc index 3998c9441..7ebc4b719 100644 --- a/frontends/ast/genrtlil.cc +++ b/frontends/ast/genrtlil.cc @@ -1304,12 +1304,8 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint) if (child->str.size() == 0) { char buf[100]; snprintf(buf, 100, "$%d", ++para_counter); - if (child->children[0]->is_signed) - cell->signed_parameters.insert(buf); cell->parameters[buf] = child->children[0]->asParaConst(); } else { - if (child->children[0]->is_signed) - cell->signed_parameters.insert(child->str); cell->parameters[child->str] = child->children[0]->asParaConst(); } continue; diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y index 54c2280a8..4c1abe5ce 100644 --- a/frontends/ilang/parser.y +++ b/frontends/ilang/parser.y @@ -191,7 +191,7 @@ cell_body: } | cell_body TOK_PARAMETER TOK_SIGNED TOK_ID constant TOK_EOL { current_cell->parameters[$4] = *$5; - current_cell->signed_parameters.insert($4); + current_cell->parameters[$4].flags |= RTLIL::CONST_FLAG_SIGNED; free($4); delete $5; } | |