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| author | Clifford Wolf <clifford@clifford.at> | 2018-02-26 15:26:01 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2018-02-26 15:26:01 +0100 |
| commit | b6fbeb0969773770af79fe4bd8f5b15c863ef90b (patch) | |
| tree | ec6260876bb5339c7834e4924d13a4ade0423a70 /frontends | |
| parent | 2aeb4d4e1231807144e62930ce9c95795265f6b3 (diff) | |
| download | yosys-b6fbeb0969773770af79fe4bd8f5b15c863ef90b.tar.gz yosys-b6fbeb0969773770af79fe4bd8f5b15c863ef90b.tar.bz2 yosys-b6fbeb0969773770af79fe4bd8f5b15c863ef90b.zip | |
Add handling of verific OPER_REDUCE_NOR
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'frontends')
| -rw-r--r-- | frontends/verific/verific.cc | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index 1a16f7508..e85e6cf71 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -478,6 +478,12 @@ bool VerificImporter::import_netlist_instance_cells(Instance *inst, RTLIL::IdStr return true; } + if (inst->Type() == OPER_REDUCE_NOR) { + SigSpec t = module->ReduceOr(NEW_ID, IN, SIGNED); + module->addNot(inst_name, t, net_map_at(inst->GetOutput())); + return true; + } + if (inst->Type() == OPER_LESSTHAN) { Net *net_cin = inst->GetCin(); if (net_cin->IsGnd()) |