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| author | Zachary Snow <zach@zachjs.com> | 2020-05-04 20:22:16 -0400 |
|---|---|---|
| committer | Zachary Snow <zach@zachjs.com> | 2020-05-06 08:43:02 -0400 |
| commit | 8f9bba1bbfdb56630dadd75a3f92f7bfb26b3df6 (patch) | |
| tree | 89b8cd47b0bc502434f631c65bd3b90aff8c2393 /frontends | |
| parent | 584780d776c92bc91731dbc2710dd8d9a624dc70 (diff) | |
| download | yosys-8f9bba1bbfdb56630dadd75a3f92f7bfb26b3df6.tar.gz yosys-8f9bba1bbfdb56630dadd75a3f92f7bfb26b3df6.tar.bz2 yosys-8f9bba1bbfdb56630dadd75a3f92f7bfb26b3df6.zip | |
verilog: allow null gen-if then block
Diffstat (limited to 'frontends')
| -rw-r--r-- | frontends/verilog/verilog_parser.y | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index 4a5aba79e..3738f8f3d 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -2533,7 +2533,12 @@ gen_stmt: ast_stack.back()->children.push_back(node); ast_stack.push_back(node); ast_stack.back()->children.push_back($3); - } gen_stmt_block opt_gen_else { + AstNode *block = new AstNode(AST_GENBLOCK); + ast_stack.back()->children.push_back(block); + ast_stack.push_back(block); + } gen_stmt_or_null { + ast_stack.pop_back(); + } opt_gen_else { SET_AST_NODE_LOC(ast_stack.back(), @1, @7); ast_stack.pop_back(); } | |