diff options
| author | Clifford Wolf <clifford@clifford.at> | 2014-07-21 12:41:29 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-07-21 12:42:02 +0200 |
| commit | 361e0d62ffd90b87c94bfc98ed3cbee1a745cd8f (patch) | |
| tree | 59c594e41320db3a58677857f30c21688427981d /frontends/vhdl2verilog | |
| parent | 1d88f1cf9f2088de7825f5292db5b40d4f73d036 (diff) | |
| download | yosys-361e0d62ffd90b87c94bfc98ed3cbee1a745cd8f.tar.gz yosys-361e0d62ffd90b87c94bfc98ed3cbee1a745cd8f.tar.bz2 yosys-361e0d62ffd90b87c94bfc98ed3cbee1a745cd8f.zip | |
Replaced depricated NEW_WIRE macro with module->addWire() calls
Diffstat (limited to 'frontends/vhdl2verilog')
0 files changed, 0 insertions, 0 deletions