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author | Marcelina KoĆcielnicka <mwk@0x04.net> | 2021-10-02 00:42:36 +0200 |
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committer | Marcelina KoĆcielnicka <mwk@0x04.net> | 2021-10-02 03:24:57 +0200 |
commit | f9aad606ca9c8f875ce3c3091daf465b73d3f513 (patch) | |
tree | b33752b61bef503c930f5d0b1227b9d7286870a6 /frontends/verilog | |
parent | 62739f7bf7b82afccd10c22bdabf89d305485966 (diff) | |
download | yosys-f9aad606ca9c8f875ce3c3091daf465b73d3f513.tar.gz yosys-f9aad606ca9c8f875ce3c3091daf465b73d3f513.tar.bz2 yosys-f9aad606ca9c8f875ce3c3091daf465b73d3f513.zip |
simplemap: refactor to use FfData.
Diffstat (limited to 'frontends/verilog')
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