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| author | Clifford Wolf <clifford@clifford.at> | 2017-02-16 12:28:42 +0100 |
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| committer | Clifford Wolf <clifford@clifford.at> | 2017-02-16 12:28:42 +0100 |
| commit | cf25dc9ce7216f740611d802eba6f978d18899e3 (patch) | |
| tree | 19576ff96dadc4de4527ece6b35415c6c69bfc99 /frontends/verilog | |
| parent | e6d56d23b5a283dbb1d220e28168abf4c59c58c2 (diff) | |
| download | yosys-cf25dc9ce7216f740611d802eba6f978d18899e3.tar.gz yosys-cf25dc9ce7216f740611d802eba6f978d18899e3.tar.bz2 yosys-cf25dc9ce7216f740611d802eba6f978d18899e3.zip | |
Copy attributes to _TECHMAP_REPLACE_ cells
Diffstat (limited to 'frontends/verilog')
0 files changed, 0 insertions, 0 deletions