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| author | Jeff Wang <jjj11x@gmail.com> | 2020-01-16 17:11:08 -0500 |
|---|---|---|
| committer | Jeff Wang <jeffrey.wang@ll.mit.edu> | 2020-01-16 18:08:58 -0500 |
| commit | cc2236d0c02be096ad1b92209072be3f16598933 (patch) | |
| tree | f16e52711b03596fcd4da3746ac067ab9ee68a36 /frontends/verilog | |
| parent | 5ddf84d430a176acf5ab638a86c84484277bee84 (diff) | |
| download | yosys-cc2236d0c02be096ad1b92209072be3f16598933.tar.gz yosys-cc2236d0c02be096ad1b92209072be3f16598933.tar.bz2 yosys-cc2236d0c02be096ad1b92209072be3f16598933.zip | |
lexer doesn't seem to return TOK_REG for logic anymore
Diffstat (limited to 'frontends/verilog')
| -rw-r--r-- | frontends/verilog/verilog_parser.y | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index 08db36276..ea0a09599 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -1261,13 +1261,14 @@ enum_type: TOK_ENUM { enum_base_type: int_vec param_range | int_atom - | /* nothing */ { addRange(astbuf1); } + | /* nothing */ {astbuf1->is_reg = true; addRange(astbuf1); } ; -int_atom: TOK_INTEGER { addRange(astbuf1); } // probably should do byte, range [7:0] here +int_atom: TOK_INTEGER {astbuf1->is_reg=true; addRange(astbuf1); } // probably should do byte, range [7:0] here ; -int_vec: TOK_REG { astbuf1->is_reg = true; } // lexer returns this for logic|bit too +int_vec: TOK_REG {astbuf1->is_reg = true;} + | TOK_LOGIC {astbuf1->is_logic = true;} ; enum_name_list: |