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| author | whitequark <whitequark@whitequark.org> | 2016-07-10 14:41:34 +0000 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2016-07-10 15:46:46 +0000 |
| commit | c0645839fe499fbc37199744cab5c624e5840dba (patch) | |
| tree | d7c48382fcba7a5b798fe7bdfd7f079a6cbcd807 /frontends/verilog | |
| parent | b5a9fba0db5a8f29cffa22aa61f9d9cb7f69009a (diff) | |
| download | yosys-c0645839fe499fbc37199744cab5c624e5840dba.tar.gz yosys-c0645839fe499fbc37199744cab5c624e5840dba.tar.bz2 yosys-c0645839fe499fbc37199744cab5c624e5840dba.zip | |
greenpak4: add GP_COUNT{8,14}_ADV cells.
Diffstat (limited to 'frontends/verilog')
0 files changed, 0 insertions, 0 deletions