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| author | Zachary Snow <zach@zachjs.com> | 2021-09-23 13:33:55 -0400 |
|---|---|---|
| committer | Zachary Snow <zach@zachjs.com> | 2021-09-23 13:33:55 -0400 |
| commit | 9658d2e337a54fc06873de716d0ae5586ffd869b (patch) | |
| tree | 96c9ac11ac3ed92c9a15f2c6c1d7d0b2bf5ac153 /frontends/verilog | |
| parent | 15fb0107dcdfcf98c56f229727c7cd701ff9b4b3 (diff) | |
| download | yosys-9658d2e337a54fc06873de716d0ae5586ffd869b.tar.gz yosys-9658d2e337a54fc06873de716d0ae5586ffd869b.tar.bz2 yosys-9658d2e337a54fc06873de716d0ae5586ffd869b.zip | |
Fix TOK_ID memory leak in for_initialization
Diffstat (limited to 'frontends/verilog')
| -rw-r--r-- | frontends/verilog/verilog_parser.y | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index 8d0ba4cf6..acb8b996c 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -2674,6 +2674,7 @@ for_initialization: AstNode *node = new AstNode(AST_ASSIGN_EQ, ident, $3); ast_stack.back()->children.push_back(node); SET_AST_NODE_LOC(node, @1, @3); + delete $1; } | non_io_wire_type range TOK_ID { frontend_verilog_yyerror("For loop variable declaration is missing initialization!"); |