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authorKaj Tuomi <kaj.tuomi@siru.fi>2019-05-18 14:20:30 +0300
committerKaj Tuomi <kaj.tuomi@siru.fi>2019-05-18 14:20:30 +0300
commit48ddbe52fb1428fc8f7f3d6444c5637eb151475f (patch)
tree64bdc5903bf099d59aa9ba9dacff03d8b7a9eda2 /frontends/verilog
parentb6345b111d994ff0de1bcd91379db1c289feb03b (diff)
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Read bigger Verilog files.
Hit parser limit with 3M gate design. This commit fix it.
Diffstat (limited to 'frontends/verilog')
-rw-r--r--frontends/verilog/Makefile.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/frontends/verilog/Makefile.inc b/frontends/verilog/Makefile.inc
index 0a1f97ac0..6a8462b41 100644
--- a/frontends/verilog/Makefile.inc
+++ b/frontends/verilog/Makefile.inc
@@ -14,7 +14,7 @@ frontends/verilog/verilog_lexer.cc: frontends/verilog/verilog_lexer.l
$(Q) mkdir -p $(dir $@)
$(P) flex -o frontends/verilog/verilog_lexer.cc $<
-frontends/verilog/verilog_parser.tab.o: CXXFLAGS += -DYYMAXDEPTH=100000
+frontends/verilog/verilog_parser.tab.o: CXXFLAGS += -DYYMAXDEPTH=10000000
OBJS += frontends/verilog/verilog_parser.tab.o
OBJS += frontends/verilog/verilog_lexer.o