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authorUdi Finkelstein <github@udifink.com>2018-08-15 19:56:30 +0300
committerUdi Finkelstein <github@udifink.com>2018-08-15 20:14:52 +0300
commit28cfc75a902574c3ad96876d2f5e01af6c583bac (patch)
tree974d6f042293bac9d8c4f7fb3dc108b5ffc05065 /frontends/verilog
parentce3dc3e01d288a8e545fb5fd24a2a06d205c6b0d (diff)
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A few minor enhancements to specify block parsing.
Just remember specify blocks are parsed but ignored.
Diffstat (limited to 'frontends/verilog')
-rw-r--r--frontends/verilog/verilog_parser.y15
1 files changed, 13 insertions, 2 deletions
diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y
index 78cac5543..61da12b76 100644
--- a/frontends/verilog/verilog_parser.y
+++ b/frontends/verilog/verilog_parser.y
@@ -688,8 +688,8 @@ path_declaration :
;
simple_path_declaration :
- parallel_path_description '=' path_delay_value ';'
- // | full_path_description '=' path_delay_value ';'
+ parallel_path_description '=' path_delay_value ';' |
+ full_path_description '=' path_delay_value ';'
;
path_delay_value :
@@ -723,6 +723,17 @@ list_of_path_delay_expressions :
parallel_path_description :
'(' specify_input_terminal_descriptor opt_polarity_operator '=' '>' specify_output_terminal_descriptor ')' ;
+full_path_description :
+ '(' list_of_path_inputs opt_polarity_operator '*' '>' list_of_path_outputs ')' ;
+
+list_of_path_inputs :
+ specify_input_terminal_descriptor |
+ list_of_path_inputs ',' specify_input_terminal_descriptor ;
+
+list_of_path_outputs :
+ specify_output_terminal_descriptor |
+ list_of_path_outputs ',' specify_output_terminal_descriptor ;
+
opt_polarity_operator :
'+'
| '-'