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| author | Zachary Snow <zach@zachjs.com> | 2021-08-13 20:51:28 -0700 |
|---|---|---|
| committer | Zachary Snow <zachary.j.snow@gmail.com> | 2021-09-21 14:52:28 -0400 |
| commit | d6fe6d4fb62be3bb5ec876f1f56356d757b65a41 (patch) | |
| tree | 442c97fc61b18ed6ade75ad34417616ac2ae4baf /frontends/verilog/verilog_parser.y | |
| parent | 6b7267b849abf7688938e5e53ae7017e8588ff18 (diff) | |
| download | yosys-d6fe6d4fb62be3bb5ec876f1f56356d757b65a41.tar.gz yosys-d6fe6d4fb62be3bb5ec876f1f56356d757b65a41.tar.bz2 yosys-d6fe6d4fb62be3bb5ec876f1f56356d757b65a41.zip | |
sv: support wand and wor of data types
This enables the usage of declarations of wand or wor with a base type
of logic, integer, or a typename. Note that declarations of nets with
2-state base types is still permitted, in violation of the spec.
Diffstat (limited to 'frontends/verilog/verilog_parser.y')
| -rw-r--r-- | frontends/verilog/verilog_parser.y | 21 |
1 files changed, 12 insertions, 9 deletions
diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index 91b1140e9..80b40f982 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -832,16 +832,10 @@ opt_wire_type_token: wire_type_token | %empty; wire_type_token: - TOK_WOR { - astbuf3->is_wor = true; + // nets + net_type { } | - TOK_WAND { - astbuf3->is_wand = true; - } | - // wires - TOK_WIRE { - } | - TOK_WIRE logic_type { + net_type logic_type { } | // regs TOK_REG { @@ -868,6 +862,15 @@ wire_type_token: astbuf3->range_right = 0; }; +net_type: + TOK_WOR { + astbuf3->is_wor = true; + } | + TOK_WAND { + astbuf3->is_wand = true; + } | + TOK_WIRE; + logic_type: TOK_LOGIC { } | |