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| author | Kamil Rakoczy <krakoczy@antmicro.com> | 2020-06-03 13:51:57 +0200 |
|---|---|---|
| committer | Kamil Rakoczy <krakoczy@antmicro.com> | 2020-06-24 11:53:50 +0200 |
| commit | 416a66aee822c999a28f580cbcdb24cdf4e73a13 (patch) | |
| tree | d827e2574f9417dc88f50fbd9446aaf42b360b18 /frontends/verilog/verilog_parser.y | |
| parent | 0835a86e30fc2a934f5e6c96b28c90b59654ed92 (diff) | |
| download | yosys-416a66aee822c999a28f580cbcdb24cdf4e73a13.tar.gz yosys-416a66aee822c999a28f580cbcdb24cdf4e73a13.tar.bz2 yosys-416a66aee822c999a28f580cbcdb24cdf4e73a13.zip | |
Add or-assignment operator
Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
Diffstat (limited to 'frontends/verilog/verilog_parser.y')
| -rw-r--r-- | frontends/verilog/verilog_parser.y | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index 15c231f3b..f7a73b00e 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -259,7 +259,7 @@ static void rewriteAsMemoryNode(AstNode *node, AstNode *rangeNode) %token TOK_INTEGER TOK_SIGNED TOK_ASSIGN TOK_ALWAYS TOK_INITIAL %token TOK_ALWAYS_FF TOK_ALWAYS_COMB TOK_ALWAYS_LATCH %token TOK_BEGIN TOK_END TOK_IF TOK_ELSE TOK_FOR TOK_WHILE TOK_REPEAT -%token TOK_DPI_FUNCTION TOK_POSEDGE TOK_NEGEDGE TOK_OR TOK_AUTOMATIC +%token TOK_DPI_FUNCTION TOK_POSEDGE TOK_NEGEDGE TOK_OR TOK_OR_ASSIGN TOK_AUTOMATIC %token TOK_CASE TOK_CASEX TOK_CASEZ TOK_ENDCASE TOK_DEFAULT %token TOK_FUNCTION TOK_ENDFUNCTION TOK_TASK TOK_ENDTASK TOK_SPECIFY %token TOK_IGNORED_SPECIFY TOK_ENDSPECIFY TOK_SPECPARAM TOK_SPECIFY_AND TOK_IGNORED_SPECIFY_AND @@ -2334,6 +2334,14 @@ simple_behavioral_stmt: ast_stack.back()->children.push_back(node); SET_AST_NODE_LOC(node, @2, @5); append_attr(node, $1); + } | + attr lvalue TOK_OR_ASSIGN delay expr { + AstNode *or_node = new AstNode(AST_BIT_OR, $2->clone(), $5); + SET_AST_NODE_LOC(or_node, @2, @5); + AstNode *node = new AstNode(AST_ASSIGN_EQ, $2, or_node); + SET_AST_NODE_LOC(node, @2, @5); + ast_stack.back()->children.push_back(node); + append_attr(node, $1); }; // this production creates the obligatory if-else shift/reduce conflict |