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| author | whitequark <whitequark@whitequark.org> | 2019-12-05 09:39:34 +0000 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2019-12-05 10:28:43 +0000 |
| commit | 72a5674c03e6749263e61751616b05b3be80e7cc (patch) | |
| tree | b66770cdbb9db43363c054d4073891f7a24641e9 /frontends/verilog/verilog_lexer.l | |
| parent | 5f4c35c7535f5a595d4e4f1adbd23b9bd594e205 (diff) | |
| download | yosys-72a5674c03e6749263e61751616b05b3be80e7cc.tar.gz yosys-72a5674c03e6749263e61751616b05b3be80e7cc.tar.bz2 yosys-72a5674c03e6749263e61751616b05b3be80e7cc.zip | |
manual: document $dffe, $dffsr, $_DFFE_*, $_DFFSR_* cells.
Diffstat (limited to 'frontends/verilog/verilog_lexer.l')
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