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| author | Clifford Wolf <clifford@clifford.at> | 2019-05-04 21:58:25 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-05-04 21:58:25 +0200 |
| commit | 70d0f389ad6e7e0ad762b62d3a626a4db5b23827 (patch) | |
| tree | 285b758efa19342a8e136772190d55672329cba2 /frontends/verilog/verilog_lexer.l | |
| parent | a01386c0e45b4eee5295db440740a1ab271396fe (diff) | |
| parent | 9804c86e87ec83edd29d224f01311b6ae1d41181 (diff) | |
| download | yosys-70d0f389ad6e7e0ad762b62d3a626a4db5b23827.tar.gz yosys-70d0f389ad6e7e0ad762b62d3a626a4db5b23827.tar.bz2 yosys-70d0f389ad6e7e0ad762b62d3a626a4db5b23827.zip | |
Merge pull request #988 from YosysHQ/clifford/fix987
Add approximate support for SV "var" keyword
Diffstat (limited to 'frontends/verilog/verilog_lexer.l')
| -rw-r--r-- | frontends/verilog/verilog_lexer.l | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/frontends/verilog/verilog_lexer.l b/frontends/verilog/verilog_lexer.l index e97632663..08e556e8e 100644 --- a/frontends/verilog/verilog_lexer.l +++ b/frontends/verilog/verilog_lexer.l @@ -208,6 +208,7 @@ YOSYS_NAMESPACE_END "endchecker" { if (formal_mode) return TOK_ENDCHECKER; SV_KEYWORD(TOK_ENDCHECKER); } "final" { SV_KEYWORD(TOK_FINAL); } "logic" { SV_KEYWORD(TOK_LOGIC); } +"var" { SV_KEYWORD(TOK_VAR); } "bit" { SV_KEYWORD(TOK_REG); } "eventually" { if (formal_mode) return TOK_EVENTUALLY; SV_KEYWORD(TOK_EVENTUALLY); } |