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| author | David Shah <dave@ds0.me> | 2020-02-02 18:12:28 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-02-02 18:12:28 +0000 |
| commit | 7033503cd9e40e16c11fe6c805a436b0e23989dd (patch) | |
| tree | 23d26103ac47ed62f2d0f805b6677943ef4f1795 /frontends/verilog/verilog_lexer.l | |
| parent | 9f5613100b360beb60608df1296ee81dc185e56c (diff) | |
| parent | 0488492ad269df9641ab317eac5568353dd61076 (diff) | |
| download | yosys-7033503cd9e40e16c11fe6c805a436b0e23989dd.tar.gz yosys-7033503cd9e40e16c11fe6c805a436b0e23989dd.tar.bz2 yosys-7033503cd9e40e16c11fe6c805a436b0e23989dd.zip | |
Merge pull request #1516 from YosysHQ/dave/dotstar
sv: Add support for wildcard port connections (.*)
Diffstat (limited to 'frontends/verilog/verilog_lexer.l')
| -rw-r--r-- | frontends/verilog/verilog_lexer.l | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/frontends/verilog/verilog_lexer.l b/frontends/verilog/verilog_lexer.l index ca23df3e8..9b43c250e 100644 --- a/frontends/verilog/verilog_lexer.l +++ b/frontends/verilog/verilog_lexer.l @@ -431,6 +431,8 @@ import[ \t\r\n]+\"(DPI|DPI-C)\"[ \t\r\n]+function[ \t\r\n]+ { "+:" { return TOK_POS_INDEXED; } "-:" { return TOK_NEG_INDEXED; } +".*" { return TOK_WILDCARD_CONNECT; } + [-+]?[=*]> { if (!specify_mode) REJECT; frontend_verilog_yylval.string = new std::string(yytext); |