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| author | Kamil Rakoczy <krakoczy@antmicro.com> | 2020-06-25 13:29:06 +0200 |
|---|---|---|
| committer | Kamil Rakoczy <krakoczy@antmicro.com> | 2020-06-25 13:29:06 +0200 |
| commit | 539087f417e08c56e47b8289ec65d418f7d14792 (patch) | |
| tree | 9d0326297441c25afc672800fc965428fafbb63c /frontends/verilog/verilog_lexer.l | |
| parent | f6d06c9f7b01641a657a9f69ef8ce9cb263ff47b (diff) | |
| download | yosys-539087f417e08c56e47b8289ec65d418f7d14792.tar.gz yosys-539087f417e08c56e47b8289ec65d418f7d14792.tar.bz2 yosys-539087f417e08c56e47b8289ec65d418f7d14792.zip | |
Support missing sub-assign and and-assign operators
Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
Diffstat (limited to 'frontends/verilog/verilog_lexer.l')
| -rw-r--r-- | frontends/verilog/verilog_lexer.l | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/frontends/verilog/verilog_lexer.l b/frontends/verilog/verilog_lexer.l index 8c9f403a3..028106381 100644 --- a/frontends/verilog/verilog_lexer.l +++ b/frontends/verilog/verilog_lexer.l @@ -527,7 +527,9 @@ import[ \t\r\n]+\"(DPI|DPI-C)\"[ \t\r\n]+function[ \t\r\n]+ { ".*" { return TOK_WILDCARD_CONNECT; } "|=" { SV_KEYWORD(TOK_OR_ASSIGN); } +"&=" { SV_KEYWORD(TOK_AND_ASSIGN); } "+=" { SV_KEYWORD(TOK_PLUS_ASSIGN); } +"-=" { SV_KEYWORD(TOK_SUB_ASSIGN); } "^=" { SV_KEYWORD(TOK_XOR_ASSIGN); } [-+]?[=*]> { |