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| author | Clifford Wolf <clifford@clifford.at> | 2019-10-24 09:14:03 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2019-10-24 09:14:03 +0200 |
| commit | d49c6b2cba0256573352ae4dd5669e94ef75b60e (patch) | |
| tree | 6ebe15eb7b1ae31dd0e03d548f426ced76ec2ca7 /frontends/verific | |
| parent | f02623abb5d8338f034d7069844418af8912ab0f (diff) | |
| download | yosys-d49c6b2cba0256573352ae4dd5669e94ef75b60e.tar.gz yosys-d49c6b2cba0256573352ae4dd5669e94ef75b60e.tar.bz2 yosys-d49c6b2cba0256573352ae4dd5669e94ef75b60e.zip | |
Add "verific -L"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'frontends/verific')
| -rw-r--r-- | frontends/verific/verific.cc | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index 9f9eeb764..c68390418 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -1939,12 +1939,18 @@ struct VerificPass : public Pass { log("Load the specified VHDL files into Verific.\n"); log("\n"); log("\n"); - log(" verific -work <libname> {-sv|-vhdl|...} <hdl-file>\n"); + log(" verific [-work <libname>] {-sv|-vhdl|...} <hdl-file>\n"); log("\n"); log("Load the specified Verilog/SystemVerilog/VHDL file into the specified library.\n"); log("(default library when -work is not present: \"work\")\n"); log("\n"); log("\n"); + log(" verific [-L <libname>] {-sv|-vhdl|...} <hdl-file>\n"); + log("\n"); + log("Look up external definitions in the specified library.\n"); + log("(-L may be used more than once)\n"); + log("\n"); + log("\n"); log(" verific -vlog-incdir <directory>..\n"); log("\n"); log("Add Verilog include directories.\n"); @@ -2158,12 +2164,17 @@ struct VerificPass : public Pass { goto check_error; } + veri_file::RemoveAllLOptions(); for (; argidx < GetSize(args); argidx++) { if (args[argidx] == "-work" && argidx+1 < GetSize(args)) { work = args[++argidx]; continue; } + if (args[argidx] == "-L" && argidx+1 < GetSize(args)) { + veri_file::AddLOption(args[++argidx].c_str()); + continue; + } break; } |