Add VerificClocking class and refactor Verific DFF handling

Signed-off-by: Clifford Wolf <clifford@clifford.at>

1 files changed, 14 insertions, 3 deletions

diff --git a/frontends/verific/verific.h b/frontends/verific/verific.h
index 2ca01072f..63d81fc3e 100644
--- a/frontends/verific/verific.h
+++ b/frontends/verific/verific.h
@@ -29,11 +29,22 @@ extern pool<int> verific_sva_prims;
 
 struct VerificImporter;
 
-struct VerificClockEdge {
+struct VerificClocking {
+	RTLIL::Module *module = nullptr;
 	Verific::Net *clock_net = nullptr;
+	Verific::Net *enable_net = nullptr;
+	Verific::Net *disable_net = nullptr;
+	Verific::Net *body_net = nullptr;
 	SigBit clock_sig = State::Sx;
-	bool posedge = false;
-	VerificClockEdge(VerificImporter *importer, Verific::Instance *inst);
+	SigBit enable_sig = State::S1;
+	SigBit disable_sig = State::S0;
+	bool posedge = true;
+
+	VerificClocking() { }
+	VerificClocking(VerificImporter *importer, Verific::Net *net);
+	RTLIL::Cell *addDff(IdString name, SigSpec sig_d, SigSpec sig_q, Const init_value = Const());
+	RTLIL::Cell *addAdff(IdString name, RTLIL::SigSpec sig_arst, SigSpec sig_d, SigSpec sig_q, Const arst_value);
+	RTLIL::Cell *addDffsr(IdString name, RTLIL::SigSpec sig_set, RTLIL::SigSpec sig_clr, SigSpec sig_d, SigSpec sig_q);
 };
 
 struct VerificImporter