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author | Clifford Wolf <clifford@clifford.at> | 2014-07-28 10:10:08 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2014-07-28 10:10:08 +0200 |
commit | ee65dea738fefbf44b91a2ac10f9a93b35115af6 (patch) | |
tree | 42aebfa59790960af52ec218ff00c3fc358bcf1a /frontends/ast | |
parent | c469be883b80137c9d3d79287b72d05aaaa17128 (diff) | |
download | yosys-ee65dea738fefbf44b91a2ac10f9a93b35115af6.tar.gz yosys-ee65dea738fefbf44b91a2ac10f9a93b35115af6.tar.bz2 yosys-ee65dea738fefbf44b91a2ac10f9a93b35115af6.zip |
Fixed signdness detection of expressions with bit- and part-selects
Diffstat (limited to 'frontends/ast')
-rw-r--r-- | frontends/ast/genrtlil.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc index 064aec93f..95e15903b 100644 --- a/frontends/ast/genrtlil.cc +++ b/frontends/ast/genrtlil.cc @@ -599,6 +599,7 @@ void AstNode::detectSignWidthWorker(int &width_hint, bool &sign_hint, bool *foun delete right_at_zero_ast; } else this_width = range->range_left - range->range_right + 1; + sign_hint = false; } else width_hint = std::max(width_hint, this_width); if (!id_ast->is_signed) |