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| author | Clifford Wolf <clifford@clifford.at> | 2017-11-28 15:53:53 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-11-28 15:53:53 +0100 |
| commit | 1f6e8f86c516f37f1d93e91c46fe427f7a646b15 (patch) | |
| tree | 76cb9650a4a7aa0e4c405525bbca63a197e7cf41 /frontends/ast/simplify.cc | |
| parent | da91b31bb242bb947533702ac7484773fa3f3d57 (diff) | |
| parent | 5e8d1922a47971c75c7e51fe8b1294f16aed0bda (diff) | |
| download | yosys-1f6e8f86c516f37f1d93e91c46fe427f7a646b15.tar.gz yosys-1f6e8f86c516f37f1d93e91c46fe427f7a646b15.tar.bz2 yosys-1f6e8f86c516f37f1d93e91c46fe427f7a646b15.zip | |
Merge pull request #462 from daveshah1/up5k
Add remaining UltraPlus cells to ice40 techlib
Diffstat (limited to 'frontends/ast/simplify.cc')
0 files changed, 0 insertions, 0 deletions