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| author | Peter Crozier <peter@crozier.com> | 2020-05-08 14:40:49 +0100 |
|---|---|---|
| committer | Peter Crozier <peter@crozier.com> | 2020-05-08 14:40:49 +0100 |
| commit | 0b6b47ca670b9219bcb81ab7d3599267c2ef7571 (patch) | |
| tree | 7f185ed9add86d52c5f55828e07b190420c77511 /frontends/ast/genrtlil.cc | |
| parent | aafaeb66dfd839b8223059884d2741dadc9e2d92 (diff) | |
| download | yosys-0b6b47ca670b9219bcb81ab7d3599267c2ef7571.tar.gz yosys-0b6b47ca670b9219bcb81ab7d3599267c2ef7571.tar.bz2 yosys-0b6b47ca670b9219bcb81ab7d3599267c2ef7571.zip | |
Implement SV structs.
Diffstat (limited to 'frontends/ast/genrtlil.cc')
| -rw-r--r-- | frontends/ast/genrtlil.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc index d4e9baa5f..a57333314 100644 --- a/frontends/ast/genrtlil.cc +++ b/frontends/ast/genrtlil.cc @@ -991,6 +991,7 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint) case AST_MODPORT: case AST_MODPORTMEMBER: case AST_TYPEDEF: + case AST_STRUCT: break; case AST_INTERFACEPORT: { // If a port in a module with unknown type is found, mark it with the attribute 'is_interface' |