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| author | Eddie Hung <eddie@fpgeh.com> | 2019-08-19 10:07:27 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-19 10:07:27 -0700 |
| commit | 2f4e0a5388c58726ec8b3d073e3ebc51897fd13c (patch) | |
| tree | bb5f6bb14eb4bd83a7e302b7e4666c716234beee /frontends/ast/ast.cc | |
| parent | e301440a0bae76dcff159c77274c91aad40021c0 (diff) | |
| parent | 98a54353b7d893752d856b3726853d4921c6aa1f (diff) | |
| download | yosys-2f4e0a5388c58726ec8b3d073e3ebc51897fd13c.tar.gz yosys-2f4e0a5388c58726ec8b3d073e3ebc51897fd13c.tar.bz2 yosys-2f4e0a5388c58726ec8b3d073e3ebc51897fd13c.zip | |
Merge remote-tracking branch 'origin/master' into xaig_dff
Diffstat (limited to 'frontends/ast/ast.cc')
| -rw-r--r-- | frontends/ast/ast.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/frontends/ast/ast.cc b/frontends/ast/ast.cc index 07ef0a86e..0d6626b19 100644 --- a/frontends/ast/ast.cc +++ b/frontends/ast/ast.cc @@ -1172,7 +1172,7 @@ void AST::process(RTLIL::Design *design, AstNode *ast, bool dump_ast1, bool dump if (design->has((*it)->str)) { RTLIL::Module *existing_mod = design->module((*it)->str); - if (!nooverwrite && !overwrite && !existing_mod->get_bool_attribute("\\blackbox")) { + if (!nooverwrite && !overwrite && !existing_mod->get_blackbox_attribute()) { log_file_error((*it)->filename, (*it)->linenum, "Re-definition of module `%s'!\n", (*it)->str.c_str()); } else if (nooverwrite) { log("Ignoring re-definition of module `%s' at %s:%d.\n", |