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| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-13 13:13:48 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-13 13:13:48 -0700 |
| commit | d39a5a77a9ec58ea97af91c961b02b5a55deaaa7 (patch) | |
| tree | 12a1888127e53afc8a9509a1619d26d5bebf4106 /frontends/aiger | |
| parent | 7f9d2d18251c3bec667993c744b568bbbe1a75ce (diff) | |
| download | yosys-d39a5a77a9ec58ea97af91c961b02b5a55deaaa7.tar.gz yosys-d39a5a77a9ec58ea97af91c961b02b5a55deaaa7.tar.bz2 yosys-d39a5a77a9ec58ea97af91c961b02b5a55deaaa7.zip | |
Add ConstEvalAig specialised for AIGs
Diffstat (limited to 'frontends/aiger')
| -rw-r--r-- | frontends/aiger/aigerparse.cc | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc index 72b37d21d..42b3c7624 100644 --- a/frontends/aiger/aigerparse.cc +++ b/frontends/aiger/aigerparse.cc @@ -234,7 +234,7 @@ void AigerReader::parse_xaiger() uint32_t lutNum = parse_xaiger_literal(f); uint32_t lutSize = parse_xaiger_literal(f); log_debug("m: dataSize=%u lutNum=%u lutSize=%u\n", dataSize, lutNum, lutSize); - ConstEval ce(module); + ConstEvalAig ce(module); for (unsigned i = 0; i < lutNum; ++i) { uint32_t rootNodeID = parse_xaiger_literal(f); uint32_t cutLeavesM = parse_xaiger_literal(f); @@ -251,12 +251,11 @@ void AigerReader::parse_xaiger() } RTLIL::Const lut_mask(RTLIL::State::Sx, 1 << input_sig.size()); for (int j = 0; j < (1 << cutLeavesM); ++j) { - ce.push(); + ce.clear(); ce.set(input_sig, RTLIL::Const{j, static_cast<int>(cutLeavesM)}); RTLIL::SigSpec o(output_sig); ce.eval(o); lut_mask[j] = o.as_const()[0]; - ce.pop(); } RTLIL::Cell *output_cell = module->cell(stringf("\\__%d__$and", rootNodeID)); log_assert(output_cell); |