diff options
| author | Eddie Hung <eddie@fpgeh.com> | 2020-01-09 08:55:36 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-01-09 08:55:36 -0800 |
| commit | 943ea4bf9ea34960bfce517450a8a466d1c54ed3 (patch) | |
| tree | 077cfd8fa388940d2f07958ee058bb58e0477807 /frontends/aiger | |
| parent | 8a47e6ddfdb49ec172f783621a64b3a8906ff5d6 (diff) | |
| download | yosys-943ea4bf9ea34960bfce517450a8a466d1c54ed3.tar.gz yosys-943ea4bf9ea34960bfce517450a8a466d1c54ed3.tar.bz2 yosys-943ea4bf9ea34960bfce517450a8a466d1c54ed3.zip | |
read_aiger: do not double-count outputs for flops
Diffstat (limited to 'frontends/aiger')
| -rw-r--r-- | frontends/aiger/aigerparse.cc | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc index bded2bfee..ae16a9e9b 100644 --- a/frontends/aiger/aigerparse.cc +++ b/frontends/aiger/aigerparse.cc @@ -756,12 +756,6 @@ void AigerReader::post_process() } for (uint32_t i = 0; i < flopNum; i++) { - log_assert(co_count < outputs.size()); - Wire *wire = outputs[co_count++]; - log_assert(wire); - log_assert(wire->port_output); - wire->port_output = false; - RTLIL::Wire *d = outputs[outputs.size() - flopNum + i]; log_assert(d); log_assert(d->port_output); |