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| author | Clifford Wolf <clifford@clifford.at> | 2015-10-13 15:40:21 +0200 |
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| committer | Clifford Wolf <clifford@clifford.at> | 2015-10-13 15:41:20 +0200 |
| commit | f42218682d2c7caa6caa81cb2ca48f0c3f62bb5b (patch) | |
| tree | eed220c7c84c673dec27bca4c2e96d919831f8b7 /examples/cmos/counter.ys | |
| parent | f13e3873212fb4338ee3dd180cb9b0cd3d134935 (diff) | |
| download | yosys-f42218682d2c7caa6caa81cb2ca48f0c3f62bb5b.tar.gz yosys-f42218682d2c7caa6caa81cb2ca48f0c3f62bb5b.tar.bz2 yosys-f42218682d2c7caa6caa81cb2ca48f0c3f62bb5b.zip | |
Added examples/ top-level directory
Diffstat (limited to 'examples/cmos/counter.ys')
| -rw-r--r-- | examples/cmos/counter.ys | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/examples/cmos/counter.ys b/examples/cmos/counter.ys new file mode 100644 index 000000000..a784f3465 --- /dev/null +++ b/examples/cmos/counter.ys @@ -0,0 +1,16 @@ + +read_verilog counter.v +read_verilog -lib cmos_cells.v + +proc;; memory;; techmap;; + +dfflibmap -liberty cmos_cells.lib +abc -liberty cmos_cells.lib;; + +# http://vlsiarch.ecen.okstate.edu/flows/MOSIS_SCMOS/latest/cadence/lib/tsmc025/signalstorm/osu025_stdcells.lib +# dfflibmap -liberty osu025_stdcells.lib +# abc -liberty osu025_stdcells.lib;; + +write_verilog synth.v +write_spice synth.sp + |