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author | Jim Lawson <ucbjrl@berkeley.edu> | 2019-04-01 11:09:12 -0700 |
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committer | Jim Lawson <ucbjrl@berkeley.edu> | 2019-04-01 11:09:12 -0700 |
commit | b8dfda876795dbf08bec49ab06ac8603025d2114 (patch) | |
tree | 35cd5485c70c17e93426d54a104018bae90ed924 /examples/anlogic/demo.v | |
parent | 6d2ea6fe5563205c0f565810d615c4900d4508d8 (diff) | |
parent | 22035c20ff071ec5c30990258850ecf97de5d5b3 (diff) | |
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Merge remote-tracking branch 'upstream/master'
Diffstat (limited to 'examples/anlogic/demo.v')
-rw-r--r-- | examples/anlogic/demo.v | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/examples/anlogic/demo.v b/examples/anlogic/demo.v new file mode 100644 index 000000000..e17db771e --- /dev/null +++ b/examples/anlogic/demo.v @@ -0,0 +1,18 @@ +module demo ( + input wire CLK_IN, + output wire R_LED +); + parameter time1 = 30'd12_000_000; + reg led_state; + reg [29:0] count; + + always @(posedge CLK_IN)begin + if(count == time1)begin + count<= 30'd0; + led_state <= ~led_state; + end + else + count <= count + 1'b1; + end + assign R_LED = led_state; +endmodule |