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| author | Ahmed Irfan <irfan@ubuntu.(none)> | 2014-01-18 21:54:52 +0100 |
|---|---|---|
| committer | Ahmed Irfan <irfan@ubuntu.(none)> | 2014-01-18 21:54:52 +0100 |
| commit | 234d0d0e1c316d7253c56c522dcc982a5e6049a1 (patch) | |
| tree | a619999bc7c6b930ba86e773638747b7164a8073 /btor.ys | |
| parent | 90483f489be172934b58ed5e6c556c353e1ea9b4 (diff) | |
| download | yosys-234d0d0e1c316d7253c56c522dcc982a5e6049a1.tar.gz yosys-234d0d0e1c316d7253c56c522dcc982a5e6049a1.tar.bz2 yosys-234d0d0e1c316d7253c56c522dcc982a5e6049a1.zip | |
script added
Diffstat (limited to 'btor.ys')
| -rw-r--r-- | btor.ys | 11 |
1 files changed, 2 insertions, 9 deletions
@@ -1,10 +1,3 @@ -#design should be loaded before executing -#set the: hierarchy -top <module_top> -#set the: hierarchy -libdir <dir> - -#high level synthesis -################# -#converting processes to cells proc; opt; opt_const -mux_undef; opt; rename -hide;;; @@ -17,6 +10,6 @@ flatten;; memory_unpack; #cell output to be a single wire splitnets -driver; +setundef -zero -undriven; opt;;; -#writing btor -write_btor design.btor; + |